Concatenation Operator

Part of the Fundamentals section of Coddy's Verilog journey — lesson 27 of 90.

The concatenation operator { } combines multiple signals, constants, or expressions into a single larger vector. It is used whenever you need to join bits together to form wider values.

What Values Work with Concatenation

You can concatenate:

Wires and regs — any signal
Constants — numbers like 4'b1010 or 8'hFF

Expressions — results of operations like a + b
Replications — repeating a value multiple times

All concatenated values must have fixed, known widths.

Basic Syntax: {value1, value2, value3, ...} The result width is the sum of all individual widths.

Examples

Combine two 4-bit values into 8 bits:

reg [3:0] high, low;
reg [7:0] word;

word = {high, low};     // high becomes upper 4 bits, low becomes lower 4

Combine with constants:

data = {4'b1010, 4'b0000};   // 8'b10100000

Combine more than two:

full = {a, b, c, d};   // All widths add up

Replication

You can repeat a value multiple times using {n{value}}:

repeat = {4{4'b1010}};   // 16'b1010101010101010 (repeat 4 times)

This is useful for sign extension:

signed_8bit = {4{sign_bit}, value_4bit};

Code Example

module concatenation_demo;
  reg [3:0] upper, lower;
  reg [7:0] combined;
  reg [11:0] repeated;
  
  initial begin
    upper = 4'b1010;
    lower = 4'b1100;
    
    combined = {upper, lower};        // 10101100
    repeated = {3{4'b1010}};          // 101010101010
    
    $display("{upper, lower} = %b", combined);
    $display("{3{4'b1010}} = %b", repeated);
    $finish;
  end
endmodule

Output:

{upper, lower} = 10101100
{3{4'b1010}} = 101010101010

Important Notes

Order matters: {a, b} is different from {b, a}
All parts must have fixed widths (no unsized numbers)
Concatenation can be used on both left and right sides of assignments

Challenge

Write the correct concatenation expressions for each task.

What to do:

Combine a and b into an 8-bit result and store in combine1
Combine c, d, and e into a 12-bit result and store in combine2
Combine f and two copies of g into a 12-bit result and store in combine3

Cheat sheet

The concatenation operator { } joins bits together into a wider vector. Result width = sum of all individual widths.

// Basic: {value1, value2, ...}
reg [3:0] high, low;
reg [7:0] word;
word = {high, low};  // high = upper bits, low = lower bits

// With constants
data = {4'b1010, 4'b0000};  // 8'b10100000

Replication {n{value}} repeats a value n times:

repeated = {3{4'b1010}};              // 12'b101010101010
signed_8bit = {4{sign_bit}, val_4b};  // sign extension

Key rules:

Order matters: {a, b} ≠ {b, a}
All parts must have fixed, known widths
Can be used on both sides of assignments

Try it yourself

module concatenation_challenge;
  reg [3:0] a, b;
  reg [3:0] c, d, e;
  reg [3:0] f, g;
  reg [7:0] combine1;
  reg [11:0] combine2, combine3;
  
  initial begin
    a = 4'b1010;
    b = 4'b0101;
    c = 4'b1111;
    d = 4'b0000;
    e = 4'b1100;
    f = 4'b1001;
    g = 4'b0110;
    
    combine1 = ______;   // Combine a and b into an 8-bit result 
    combine2 = ______;   // Combine c, d, and e into a 12-bit result 
    combine3 = ______;   // Combine f and two copies of g into a 12-bit result 
    
    $display("{a, b} = %b", combine1);
    $display("{c, d, e} = %b", combine2);
    $display("{f, g, g} = %b", combine3);
    $finish;
  end
endmodule