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Display And Monitor

Part of the Fundamentals section of Coddy's Verilog journey — lesson 75 of 90.

$display and $monitor are system tasks used to print information from your simulation. They help you see what is happening inside your design.

$display

$display prints a message once at the moment it is executed.

Syntax:

$display("message", variables);

Example:

initial begin
  $display("Simulation started");
  #10;
  $display("Time 10");
  #10;
  $display("Time 20");
end

Output:

Simulation started
Time 10
Time 20

$monitor

$monitor prints a message automatically whenever any of its variables change.

Syntax:

$monitor("message", variables);

Example:

initial begin
  a = 0; b = 0;
  $monitor("Time %0t: a=%b, b=%b", $time, a, b);
  #10 a = 1;
  #10 b = 1;
  #10 a = 0;
end

Output:

Time 0: a=0, b=0
Time 10: a=1, b=0
Time 20: a=1, b=1
Time 30: a=0, b=1

$display vs $monitor

 $display$monitor
When it printsOnce when executedEvery time a variable changes
How many timesAs many times as you call itContinuously (until changed)
Use forHeaders, test messagesTracking changing signals

Common Format Specifiers

SpecifierMeaningExample
%bBinary$display("%b", a);
%dDecimal$display("%d", count);
%hHexadecimal$display("%h", data);
%tTime$display("%t", $time);
%0tTime (no spaces)$display("%0t", $time);
%sString$display("%s", "Hello");

Important Rules

RuleExplanation
$display prints onceGood for headers and final results
$monitor prints on changeGood for watching signals
Only one $monitor activeLast one overrides previous
Use $finish to stopOtherwise simulation may run forever
challenge icon

Challenge

Add the missing $display and $monitor statements to this testbench.

What to do:

  1. Add $display to print a header: "Testing OR Gate"
  2. Add $monitor to print time, x, y, and z whenever any signal changes. Format: "Time %0t: x=%b, y=%b, z=%b"
  3. Add $display at the end to print "Test complete"

Cheat sheet

$display prints once when executed; $monitor prints automatically whenever any of its variables change.

$display("message", variables);
$monitor("message", variables);

Example:

initial begin
  $display("Simulation started");
  $monitor("Time %0t: a=%b, b=%b", $time, a, b);
  #10 a = 1;
  #10 b = 1;
end

Common format specifiers:

  • %b — Binary
  • %d — Decimal
  • %h — Hexadecimal
  • %t / %0t — Time (with/without padding)
  • %s — String

Key rules:

  • Only one $monitor is active at a time — the last one overrides previous ones.
  • Use $finish to stop the simulation.

Try it yourself

module or_gate (
  input x,
  input y,
  output z
);
  assign z = x | y;
endmodule

module testbench;
  reg x, y;
  wire z;
  
  or_gate dut (
    .x(x),
    .y(y),
    .z(z)
  );

  initial begin
    // TODO: Add $display header "Testing OR Gate"
    
    
    // TODO: Add $monitor to track time, x, y, z
    // Format: "Time %0t: x=%b, y=%b, z=%b"
    
    
    // Apply stimulus
    x = 0; y = 0; #10;
    x = 0; y = 1; #10;
    x = 1; y = 0; #10;
    x = 1; y = 1; #10;
    
    // TODO: Add $display "Test complete"
    
    
    $finish;
  end
endmodule
quiz iconTest yourself

This lesson includes a short quiz. Start the lesson to answer it and track your progress.

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