Unsized Numbers
Part of the Fundamentals section of Coddy's Verilog journey — lesson 15 of 90.
An unsized number is a number written without specifying how many bits it has. When you write a number without a size prefix, Verilog assumes it is 32 bits by default.
a = 'b1010; // Unsized: Verilog treats this as 32 bits
a = 32'b1010; // Same as above, but explicitUnsized numbers use only the format and value: [format][value]
<strong>format</strong>— the base of the number:bfor binary,dfor decimal,hfor hexadecimal, orofor octal<strong>value</strong>— the actual number (for example,1010)
The apostrophe ' is still required between the format and value, but there is no bit count before it.
'b1010— 32-bit binary 1010'd255— 32-bit decimal 255'hFF— 32-bit hex FF'b1— 32-bit binary 1 (with 31 leading zeros)
Code Example:
reg [7:0] data;
initial begin
data = 1010; // Unsized: 32-bit value (may cause warning)
data = 'd255; // Unsized: 32-bit decimal 255
data = 'hFF; // Unsized: 32-bit hex FF
endUnsized vs Sized
| Unsized | Sized | |
|---|---|---|
| Example | 1010 or 'd255 | 8'b1010 or 8'd255 |
| Bit width | 32 bits (default) | Explicit (as specified) |
| Apostrophe | Required with format | Required |
| When to use | Simple testbench code | Hardware assignments |
Potential Problem
Unsized numbers can cause unexpected behavior when assigned to smaller registers:
reg [3:0] small;
small = 'b1111; // 32-bit value, but fits in 4 bits (fine)
small = 'b10000; // 32-bit value, but too large! (warning)The second example assigns a 32-bit value 10000 to a 4-bit register. Only the lower 4 bits are kept (0000), which may not be what you expect.
When to Use Unsized Numbers
Unsized numbers are convenient for:
- Simple numbers in testbenches
- Loop counters
$displaystatements
For actual hardware assignments, use sized numbers to be explicit and avoid warnings.
Challenge
In the code below, some numbers are unsized. Change them to sized numbers (8 bits) to avoid warnings.
What to do:
- Change
ato an 8-bit binary number for 1010 - Change
bto an 8-bit decimal number for 255 - Change
cto an 8-bit hex number for FF
Cheat sheet
Unsized numbers in Verilog default to 32 bits. Syntax: '[format][value]
'b1010 // 32-bit binary
'd255 // 32-bit decimal
'hFF // 32-bit hexSized numbers use [bits]'[format][value]:
8'b1010 // 8-bit binary
8'd255 // 8-bit decimal
8'hFF // 8-bit hexAssigning an unsized number to a smaller register keeps only the lower bits — use sized numbers for hardware assignments to avoid warnings and unexpected truncation.
Try it yourself
module unsized_challenge;
reg [7:0] a, b, c;
initial begin
a = 'b1010; // Change to sized (8-bit binary)
b = 'd255; // Change to sized (8-bit decimal)
c = 'hFF; // Change to sized (8-bit hex)
$display("a = %b", a);
$display("b = %b", b);
$display("c = %b", c);
$finish;
end
endmoduleThis lesson includes a short quiz. Start the lesson to answer it and track your progress.
All lessons in Fundamentals
4Operators Part 1
Arithmetic OperatorsModulo OperatorComparison OperatorsRecap - Simple MathBitwise Operators7Assign And Gates
Continuous AssignmentAssign With OperatorsBuilt In Gate PrimitivesAND OR NOT GatesXOR XNOR GatesRecap - Logic Gate Circuit10Decision Making
If StatementIf - ElseRecap - Simple ComparatorCase StatementCasex And CasezRecap - ALU Design5Operators Part 2
Logical OperatorsReduction OperatorsShift OperatorsConcatenation OperatorConditional OperatorRecap - Operator Challenge3Number System
Binary RepresentationSized NumbersUnsized NumbersNegative NumbersSpecial Values X And ZRecap - Number Formats6Modules
Module StructureInput And Output PortsInout PortsModule InstantiationPort Mapping By NamePort Mapping By OrderRecap - Build A Module9Procedural Blocks
Always BlockInitial BlockSensitivity ListBlocking AssignmentNon Blocking AssignmentRecap - Always vs Initial15Traffic Light Controller
Defining The StatesState Machine Logic