XOR XNOR Gates
Part of the Fundamentals section of Coddy's Verilog journey — lesson 41 of 90.
This lesson covers two additional logic gates: XOR (exclusive OR) and XNOR (exclusive NOR). These gates are useful for comparing bits and parity checking.
XOR Gate
The XOR gate outputs 1 when the inputs are different.
Truth Table (2-input):
| a | b | out |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
Verilog gate primitive:
xor(out, a, b);Continuous assignment equivalent:
assign out = a ^ b;XNOR Gate
The XNOR gate outputs 1 when the inputs are the same. It is the opposite of XOR.
Truth Table (2-input):
| a | b | out |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
Verilog gate primitive:
xnor(out, a, b);Continuous assignment equivalent:
assign out = a ~^ b; // or ~(a ^ b)Multiple Inputs
XOR and XNOR gates can have more than 2 inputs. The output is:
- XOR: 1 if an odd number of inputs are 1
- XNOR: 1 if an even number of inputs are 1
xor(out, a, b, c); // 3-input XOR
xnor(out, p, q, r, s); // 4-input XNORExample (3-input XOR):
| a | b | c | out |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 |
| 0 | 1 | 0 | 1 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 0 | 1 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 0 |
| 1 | 1 | 1 | 1 |
Common Uses
| Use | Example |
|---|---|
| Compare if two bits are different | xor(diff, a, b) |
| Compare if two bits are the same | xnor(same, a, b) |
| Parity generation (odd number of 1's) | xor(parity, data[0], data[1], data[2], data[3]) |
| Parity checking (even number of 1's) | xnor(parity, data[0], data[1], data[2], data[3]) |
Code Example
module xor_xnor_demo (
input a, b,
output xor_out,
output xnor_out
);
xor(xor_out, a, b);
xnor(xnor_out, a, b);
endmoduleSummary Table
| Gate | Output 1 when | Primitive | Operator |
|---|---|---|---|
| XOR | Inputs are different | xor(out, a, b) | ^ |
| XNOR | Inputs are the same | xnor(out, a, b) | ~^ |
Challenge
Add the missing gate primitives based on the tasks.
What to do:
- Create an XOR gate with output
xor_resultand inputsxandy - Create an XNOR gate with output
xnor_resultand inputsxandy
Cheat sheet
XOR outputs 1 when inputs are different. XNOR outputs 1 when inputs are the same.
| Gate | Output 1 when | Primitive | Operator |
|---|---|---|---|
| XOR | Inputs are different | xor(out, a, b) | ^ |
| XNOR | Inputs are the same | xnor(out, a, b) | ~^ |
For multiple inputs: XOR outputs 1 if an odd number of inputs are 1; XNOR outputs 1 if an even number of inputs are 1.
xor(out, a, b, c); // 3-input XOR
xnor(out, p, q, r, s); // 4-input XNORTry it yourself
module xor_xnor_challenge (
input x,
input y,
output xor_result,
output xnor_result
);
// TODO: Add XOR gate (xor_result = x ^ y)
// TODO: Add XNOR gate (xnor_result = x ~^ y)
endmoduleThis lesson includes a short quiz. Start the lesson to answer it and track your progress.
All lessons in Fundamentals
4Operators Part 1
Arithmetic OperatorsModulo OperatorComparison OperatorsRecap - Simple MathBitwise Operators7Assign And Gates
Continuous AssignmentAssign With OperatorsBuilt In Gate PrimitivesAND OR NOT GatesXOR XNOR GatesRecap - Logic Gate Circuit10Decision Making
If StatementIf - ElseRecap - Simple ComparatorCase StatementCasex And CasezRecap - ALU Design5Operators Part 2
Logical OperatorsReduction OperatorsShift OperatorsConcatenation OperatorConditional OperatorRecap - Operator Challenge3Number System
Binary RepresentationSized NumbersUnsized NumbersNegative NumbersSpecial Values X And ZRecap - Number Formats6Modules
Module StructureInput And Output PortsInout PortsModule InstantiationPort Mapping By NamePort Mapping By OrderRecap - Build A Module9Procedural Blocks
Always BlockInitial BlockSensitivity ListBlocking AssignmentNon Blocking AssignmentRecap - Always vs Initial15Traffic Light Controller
Defining The StatesState Machine Logic