Recap - Number Formats
Part of the Fundamentals section of Coddy's Verilog journey. Lesson 18 of 90.
Challenge
Complete the code by writing the correct values in the specified formats.
What to do:
- Set
ato 8-bit binary for decimal 170 (10101010) - Set
bto 8-bit decimal for 255 - Set
cto 16-bit hex for FF - Set
dto a 4-bit value where bit 2 is X (others 1) - Set
eto all bits Z (4 bits)
Try it yourself
module number_formats;
wire [7:0] a, b;
wire [15:0] c;
wire [3:0] d, e;
assign a = ______; // 8-bit binary for 170
assign b = ______; // 8-bit decimal for 255
assign c = ______; // 16-bit hex for FF
assign d = ______; // 4-bit: bit 2 is X, others 1
assign e = ______; // 4-bit: all bits Z
initial begin
$display("a = %b", a);
$display("b = %b", b);
$display("c = %h", c);
$display("d = %b", d);
$display("e = %b", e);
$finish;
end
endmoduleAll lessons in Fundamentals
4Operators Part 1
Arithmetic OperatorsModulo OperatorComparison OperatorsRecap - Simple MathBitwise Operators7Assign And Gates
Continuous AssignmentAssign With OperatorsBuilt In Gate PrimitivesAND OR NOT GatesXOR XNOR GatesRecap - Logic Gate Circuit10Decision Making
If StatementIf - ElseRecap - Simple ComparatorCase StatementCasex And CasezRecap - ALU Design5Operators Part 2
Logical OperatorsReduction OperatorsShift OperatorsConcatenation OperatorConditional OperatorRecap - Operator Challenge3Number System
Binary RepresentationSized NumbersUnsized NumbersNegative NumbersSpecial Values X And ZRecap - Number Formats6Modules
Module StructureInput And Output PortsInout PortsModule InstantiationPort Mapping By NamePort Mapping By OrderRecap - Build A Module9Procedural Blocks
Always BlockInitial BlockSensitivity ListBlocking AssignmentNon Blocking AssignmentRecap - Always vs Initial15Traffic Light Controller
Defining The StatesState Machine LogicPractice on your own: Online Verilog compiler