Reduction Operators

Part of the Fundamentals section of Coddy's Verilog journey — lesson 25 of 90.

Reduction operators work on all bits of a single vector and reduce them to a single bit result. Unlike bitwise operators that compare two numbers bit-by-bit, reduction operators take one number and perform an operation across all its bits to produce a single result.

Operator	Operation	Result
`&`	Reduction AND	1 if all bits are 1
`\|`	Reduction OR	1 if at least one bit is 1
`^`	Reduction XOR	1 if odd number of bits are 1
`~&`	Reduction NAND	0 if all bits are 1
`~\|`	Reduction NOR	0 if at least one bit is 1
`~^`	Reduction XNOR	1 if even number of bits are 1

How They Work

Reduction AND (&):

&4'b1111 = 1   // all bits are 1
&4'b1011 = 0   // not all bits are 1
&4'b0000 = 0   // all bits are 0

Reduction OR (|):

|4'b0000 = 0   // no bits are 1
|4'b0100 = 1   // at least one bit is 1
|4'b1111 = 1   // all bits are 1

Reduction XOR (^):

^4'b1010 = 0   // two 1's (even) → 0
^4'b1000 = 1   // one 1 (odd) → 1
^4'b1111 = 0   // four 1's (even) → 0

Code Example

module reduction_demo;
  reg [3:0] a, b, c;
  reg and_red, or_red, xor_red;
  
  initial begin
    a = 4'b1111;
    b = 4'b1010;
    c = 4'b1000;
    
    and_red = &a;      // 1111 → 1
    or_red  = |b;      // 1010 → 1
    xor_red = ^c;      // 1000 → 1
    
    $display("&4'b1111 = %d", and_red);
    $display("|4'b1010 = %d", or_red);
    $display("^4'b1000 = %d", xor_red);
    $finish;
  end
endmodule

Output:

&4'b1111 = 1
|4'b1010 = 1
^4'b1000 = 1

Common Uses

Check if all bits are 1:

all_ones = &data;   // 1 if data == 8'b11111111

Check if any bit is 1:

any_one = |data;    // 1 if data != 0

Check parity (odd number of 1's):

odd_parity = ^data; // 1 if odd number of 1's

Check if all bits are 0:

all_zeros = ~|data; // 1 if data == 0

Challenge

Write the correct reduction expressions for each task.

What to do:

Check if all bits of a are 1 and store in all_ones
Check if any bit of b is 1 and store in any_one
Check if c has an odd number of 1's and store in odd_parity

Cheat sheet

Reduction operators work on all bits of a single vector and reduce them to a single bit result.

Operator	Operation	Result
`&`	Reduction AND	1 if all bits are 1
`\|`	Reduction OR	1 if at least one bit is 1
`^`	Reduction XOR	1 if odd number of bits are 1
`~&`	Reduction NAND	0 if all bits are 1
`~\|`	Reduction NOR	0 if at least one bit is 1
`~^`	Reduction XNOR	1 if even number of bits are 1

Common uses:

all_ones   = &data;   // 1 if all bits are 1
any_one    = |data;   // 1 if any bit is 1 (data != 0)
odd_parity = ^data;   // 1 if odd number of 1's
all_zeros  = ~|data;  // 1 if data == 0

Try it yourself

module reduction_challenge;
  reg [3:0] a, b, c;
  reg all_ones, any_one, odd_parity;
  
  initial begin
    a = 4'b1111;
    b = 4'b0100;
    c = 4'b1011;
    
    all_ones  = ______;   // all bits 1?
    any_one   = ______;   // any bit 1?
    odd_parity = ______;   // odd number of 1's?
    
    $display("&4'b1111 = %d", all_ones);
    $display("|4'b0100 = %d", any_one);
    $display("^4'b1011 = %d", odd_parity);
    $finish;
  end
endmodule