Logical Operators
Part of the Fundamentals section of Coddy's Verilog journey — lesson 24 of 90.
Logical operators work on whole values and return a single result: 1 (true) or 0 (false). Unlike bitwise operators that work bit-by-bit, logical operators treat the entire value as either true (non-zero) or false (zero).
| Type | Example | Result |
|---|---|---|
| Bitwise AND | 4'b1010 & 4'b1100 | 4'b1000 (multiple bits) |
| Logical AND | (4'b1010 && 4'b1100) | 1 (single bit) |
Available Logical Operators
| Operator | Meaning | Description |
|---|---|---|
&& | Logical AND | True if both operands are true (non-zero) |
|| | Logical OR | True if at least one operand is true |
! | Logical NOT | True if operand is false (zero) |
How They Work
Logical AND (<strong>&&</strong>):
(5 && 3) // 1 (both non-zero)
(5 && 0) // 0 (second is zero)
(0 && 0) // 0 (both zero)Logical OR (<strong>||</strong>):
(5 || 3) // 1 (at least one non-zero)
(5 || 0) // 1 (first non-zero)
(0 || 0) // 0 (both zero)Logical NOT (<strong>!</strong>):
!5 // 0 (non-zero becomes false)
!0 // 1 (zero becomes true)Code Example
module logical_demo;
reg a, b;
reg and_res, or_res, not_res;
initial begin
a = 5;
b = 0;
and_res = (a && b); // 5 && 0 = 0
or_res = (a || b); // 5 || 0 = 1
not_res = !a; // !5 = 0
$display("5 && 0 = %d", and_res);
$display("5 || 0 = %d", or_res);
$display("!5 = %d", not_res);
$finish;
end
endmoduleOutput:
5 && 0 = 0
5 || 0 = 1
!5 = 0Common Use
Logical operators are used in if statements and conditions:
if (a && b) // True if both a and b are non-zero
$display("Both true");
if (a || b) // True if at least one is non-zero
$display("At least one true");
if (!reset) // True when reset is 0
$display("Reset is inactive");Challenge
Write the correct logical expressions for each task.
What to do:
- Check if
value1ANDvalue2are both true and store inand_out - Check if
value1ORvalue2is true and store inor_out - Check if
value1is false and store innot_out
Cheat sheet
Logical operators treat entire values as true (non-zero) or false (zero), returning a single bit result.
| Operator | Meaning | Result |
|---|---|---|
&& | Logical AND | 1 if both operands are non-zero |
|| | Logical OR | 1 if at least one operand is non-zero |
! | Logical NOT | 1 if operand is zero |
(5 && 3) // 1
(5 && 0) // 0
(5 || 0) // 1
(0 || 0) // 0
!5 // 0
!0 // 1Compared to bitwise operators, logical operators collapse the whole value:
4'b1010 & 4'b1100 // 4'b1000 (bitwise, multiple bits)
4'b1010 && 4'b1100 // 1 (logical, single bit)Commonly used in conditions:
if (a && b) // true if both non-zero
if (a || b) // true if at least one non-zero
if (!reset) // true when reset is 0Try it yourself
module logical_challenge;
reg [3:0] value1, value2;
reg and_out, or_out, not_out;
initial begin
value1 = 4'd12;
value2 = 4'd5;
and_out = ______; // value1 && value2
or_out = ______; // value1 || value2
not_out = ______; // !value1
$display("%d && %d = %d", value1, value2, and_out);
$display("%d || %d = %d", value1, value2, or_out);
$display("!%d = %d", value1, not_out);
$finish;
end
endmoduleThis lesson includes a short quiz. Start the lesson to answer it and track your progress.
All lessons in Fundamentals
4Operators Part 1
Arithmetic OperatorsModulo OperatorComparison OperatorsRecap - Simple MathBitwise Operators7Assign And Gates
Continuous AssignmentAssign With OperatorsBuilt In Gate PrimitivesAND OR NOT GatesXOR XNOR GatesRecap - Logic Gate Circuit10Decision Making
If StatementIf - ElseRecap - Simple ComparatorCase StatementCasex And CasezRecap - ALU Design5Operators Part 2
Logical OperatorsReduction OperatorsShift OperatorsConcatenation OperatorConditional OperatorRecap - Operator Challenge3Number System
Binary RepresentationSized NumbersUnsized NumbersNegative NumbersSpecial Values X And ZRecap - Number Formats6Modules
Module StructureInput And Output PortsInout PortsModule InstantiationPort Mapping By NamePort Mapping By OrderRecap - Build A Module9Procedural Blocks
Always BlockInitial BlockSensitivity ListBlocking AssignmentNon Blocking AssignmentRecap - Always vs Initial15Traffic Light Controller
Defining The StatesState Machine Logic